Scan apparatus capable of fault diagnosis and scan chain fault diagnosis method

ABSTRACT

Provided are scan device and method of diagnosing scan chain fault. The scan device for diagnosing a fault includes a scan partition including a plurality of scan chains which include path control scan flipflops connected to scan flipflops in cascade. In the scan partition, connection paths of the scan flipflops are controllable. The connection paths of the path control scan flipflops are controlled to detect a position of a fault such that a fault range in the scan partition is reduced to diagnose the fault.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to Korean Patent Application Nos.10-2021-0021468 (filed on Feb. 17, 2021) and 10-2022-0018268 (filed onFeb. 11, 2022), which are all hereby incorporated by reference in theirentirety.

BACKGROUND

The present invention relates to a scan device capable of faultdiagnosis and a method of diagnosing a scan chain fault.

According to existing hardware-based scan chain fault diagnosis methods,a diagnostic resolution for fault diagnosis may be maximized usingadditional hardware. However, most of the methods focus on single faultdiagnosis in a scan chain. According to a method of diagnosing multiplefaults, it is possible to make multiple diagnoses, but many test pinsare additionally required for structural application. Also, with anincrease in the number of faults in circuitry, the diagnostic resolutiondrastically degrades.

In an initial processing stage before processing stabilization, a largenumber of faults occur in practice. Without a method of accuratelymaking diagnoses on such a large number of faults at a high resolution,time and costs required for physical analysis on fault candidatepositions which are diagnosed later remarkably increase.

One of the problems to be solved by this embodiment is to providing ascan device and method for diagnosing a single scan chain fault and aplurality of scan chain faults at a high resolution.

SUMMARY

Scan device according to the present embodiment comprises: a scanpartition including a plurality of scan chains which include pathcontrol scan flipflops connected to scan flipflops in cascade, in thescan partition, connection paths of the scan flipflops are controllable,and the connection paths of the path control scan flipflops arecontrolled to detect a position of a fault such that a fault range inthe scan partition is reduced to diagnose the fault.

According to an aspect of present embodiment, the path control scanflipflops may be disposed in an array in the scan partition, and theconnection paths of the path control scan flipflops disposed in the samecolumn in the array may be controlled with the same path control signal.

According to an aspect of present embodiment, each of the path controlscan flipflops may include: a first input to which an output of aprevious stage is provided in the scan chain in which the path controlscan flipflop is disposed; a second input to which an output of the samecolumn as the path control scan flipflop in another scan chain includedin the scan partition is provided; a multiplexer (MUX) configured tooutput any one of signals provided to the first input and the secondinput according to a path control signal; and a flipflop.

According to an aspect of present embodiment, the scan device diagnosingthe fault may perform a first phase of controlling the connection pathsof the path control scan flipflops to reduce the fault range in the scanpartition and detect the position of the fault and further perform asecond phase when three or more faults are detected in the scanpartition as a result of the first phase.

According to an aspect of present embodiment, each of the scan chainsmay include L of the scan flipflops, the scan partition may include theN scan chains, and the first phase may include: (a) performing a flushtest without changing the paths; (b) providing a path control signal toan (N^(i))^(th) column, where N^(i) is smaller than but closest to L, tochange the paths and performing a flush test; and (c) sequentiallyproviding the path control signal to (multiples of N^(i-1))^(th) columnsand (multiples of N^(i-2))^(th) columns to a first column, of which thepaths have not been changed, to change the paths and performing a flushtest (N, L, and i: integers greater than or equal to 0).

According to an aspect of present embodiment, the paths formed in thesecond phase may be paths which are not connected in operations (a) to(c).

According to an aspect of present embodiment, when no fault is detectedor two or fewer faults are detected in the scan partition as a result ofthe first phase, the scan device may stop detecting the position of thefault.

According to an aspect of present embodiment, the position of the faultmay be detected through the flush test, which provides a flush patternincluding logic highs and logic lows at a predetermined ratio, and whenan input signal including the logic highs and the logic lows at thepredetermined ratio is output with a changed phase, the path controlscan flipflop may be determined to be faulty.

A method of diagnosing a scan chain fault according to the presentembodiment comprises: a first phase of changing connection paths of pathcontrol scan flipflops to reduce a fault range in a scan partition,which includes a plurality of scan chains including the path controlscan flipflops connected to simple scan flipflops in cascade, and detecta fault; and a second phase in which the path control scan flipflops areconnected to connection paths, which have not been changed in the firstphase, according to a result of the first phase to detect a position ofthe fault in the scan partition.

According to an aspect of present embodiment, the path control scanflipflops may be disposed in an array in the scan partition, and theconnection paths of the path control scan flipflops disposed in the samecolumn in the array may be controlled with the same path control signal.

According to an aspect of present embodiment, each of the path controlscan flipflops may include: a first input to which an output of aprevious stage is provided in the scan chain in which the path controlscan flipflop is disposed; a second input to which an output of the samecolumn as the path control scan flipflop in another scan chain includedin the scan partition is provided; a MUX configured to output any one ofsignals provided to the first input and the second input according to apath control signal; and a flipflop.

According to an aspect of present embodiment, the second phase may beperformed when three or more faults are detected in the scan partitionas a result of the first phase.

According to an aspect of present embodiment, each of the scan chainsmay include L of the scan flipflops, the scan partition may include theN scan chains, and the first phase may include: (a) performing a flushtest without changing the paths; (b) providing a path control signal toan (N^(i))^(th) column, where N^(i) is smaller than but closest to L, tochange the paths and performing a flush test; and (c) sequentiallyproviding the path control signal to (multiples of N^(i-1))^(th) columnsand (multiples of N^(i-2))^(th) columns to a first column, of which thepaths have not been changed, to change the paths and performing a flushtest (N, L, and i: integers greater than or equal to 0).

According to an aspect of present embodiment, the second phase mayinclude providing the path control signal to the (N^(i))^(th) column andN^(i-1)th column to the first column in order of not receiving the pathcontrol signal in operations (a) to (c) to detect the fault.

According to an aspect of present embodiment, when no fault is detectedor two or fewer faults are detected in the scan partition as a result ofthe first phase, the detection of the position of the fault may bestopped.

According to an aspect of present embodiment, the position of the faultmay be detected through the flush test, which provides a flush patternincluding logic highs and logic lows at a predetermined ratio, and whenan input signal having the logic highs and the logic lows at thepredetermined ratio is output with a different phase than the inputflush pattern, the path control scan flipflop may be determined to befaulty.

According to the present embodiment, an advantageous effect that singledefects and multiple defects located in the scan partition can bedetected with high resolution is provided.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram showing an overview of a scan device according tothe present exemplary embodiment.

FIG. 2 is a circuit diagram showing an overview of a path control scanflipflop according to the present exemplary embodiment.

FIG. 3 is a flowchart illustrating an overview of a method of diagnosinga scan chain fault according to the present exemplary embodiment.

FIGS. 4 to 7 are diagrams illustrating first to fourth operations of afirst phase.

FIGS. 8 to 11 are diagrams illustrating the first phase according toanother exemplary embodiment.

FIG. 12 is a diagram illustrating a connection relationship in any oneoperation of a second phase.

FIG. 13 is a diagram illustrating a connection relationship in anotheroperation of the second phase.

FIG. 14 is a diagram illustrating a connection relationship in stillanother operation of the second phase.

FIG. 15 is a diagram illustrating a connection relationship in yetanother operation of the second phase.

FIGS. 16 and 17 are diagrams illustrating a method of detecting whethera multiplexer is faulty.

DETAILED DESCRIPTION

Hereinafter, the present embodiment will be described with reference tothe accompanying drawings.

FIG. 1 is a diagram showing an overview of a scan device 1 according tothe present exemplary embodiment. The scan device 1 includes a scanpartition SP including a plurality of scan chains SC1, SC2, and SC3,which include path control scan flipflops PSFF connected to scanflipflops SFF in cascade, and a control unit 100 for controllingconnection paths of scan flipflops in the scan partition SP. The controlunit 100 controls connection paths of the path control scan flipflopsPSFF to reduce a fault range in the scan partition SP and detect theposition of a fault, thereby diagnosing the fault.

In the shown embodiment, the simple scan flipflops SFF and the pathcontrol scan flipflops PSFF constituting the scan partition SP may bedisposed in an array, and the same path control signal pc is provided toflipflops included in the same column.

According to an exemplary embodiment, when the number of scan chains SCincluded in the scan partition SP is N and the length of the scan chainsSC is L, a maximum integer i which is smaller than or equal to L iscalculated as N′. A path control signal provided to an (N^(i))^(th)column is referred to as pci, and a path control signal provided to(multiples of N^(i-1))^(th) columns is referred to as pci−1. A pathcontrol signal provided to (multiples of 1)^(th) columns among columnsto which no path control signal is allocated is referred to as pc0.

In the exemplary embodiment shown in FIG. 1 , the number of scan chainsSC included in the scan partition is 3, and the length of the scanchains SC is 10. Since 3²=9, the maximum integer i is 2. Accordingly, apath control signal provided to a 3² column is referred to as pc2, and apath control signal provided to 3^(rd) and 6^(th), which are multiplesof 3¹, columns is referred to as pc1. Also, when a path control signalprovided to (multiples of 1)^(th) columns among columns to which no pathcontrol signal is allocated is referred to as pc0, the path controlsignals are as shown in FIG. 1 .

However, the exemplary embodiment illustrated in FIG. 1 is forconvenience of description and is not intended to limit the scope of thepresent invention. It is self-evident that the number of scan chains SCincluded in the scan partition SP, the length of the scan chains SC, andthe number of scan partitions included in the scan device may vary.

The control unit 100 may provide the path control signals pc2, pc1, andpc0. For example, the control unit 100 may be automatic test equipment(ATE) connected to a device under test (DUT) including the scan device1, and the scan device 1 may electrically communicate with the controlunit 100 through an external connection terminal (not shown) formed onthe DUT.

FIG. 2 is a circuit diagram showing an overview of the path control scanflipflop PSFF according to the present exemplary embodiment. Referringto FIGS. 1 and 2 , in the path control scan flipflop PSFF, an output P0of a previous stage of a scan chain connected in cascade is provided toone input, and an output P1 of another scan chain in the same column asthe path control scan flipflop PSFF is provided to the other input.Also, the path control scan flipflop PSFF includes a multiplexer (MUX)to which the path control signal pc is provided and a scan flipflop SFFto which an output signal of the MUX is provided.

The scan flipflop SFF may be a D flipflop to which the output of the MUXis provided as an input. Test patterns are sequentially provided to thescan flipflop SFF through the scan chain and provide the test patternsto the DUT (not shown). Also, the scan flipflop SFF captures an outputcorresponding to the test patterns from the DUT (not shown) and providesthe output to the outside of the scan chain. As described above, thesame path control signal pc is provided to flipflops included in thesame column among the path control scan flipflops PSFF disposed in anarray.

A method of diagnosing a scan chain fault according to the presentembodiment will be described below with reference to the accompanyingdrawings. FIG. 3 is a flowchart illustrating an overview of a method ofdiagnosing a scan chain fault according to the present exemplaryembodiment. Referring to FIG. 3 , the method of diagnosing a scan chainfault according to the present exemplary embodiment includes a firstphase S100 of controlling connection paths of the path control scanflipflops PSFF to reduce a fault range in a scan partition, whichincludes a plurality of scan chains including the path control scanflipflops PSFF connected to the simple scan flipflops SFF in cascade,and detect a fault and a second phase S200 in which the path controlscan flipflops PSFF are connected to connection paths, which have notbeen changed in the first phase S100, according to a result of the firstphase S100 to detect a position of the fault in the scan partition.

FIGS. 4 to 7 are diagrams illustrating first to fourth operations of thefirst phase S100. Faulty path control scan flipflops are shown in a darkcolor, and the position of a fault detected in each operation is shownin a broken-line quadrangle. Referring to FIG. 4 , in a first operationof the first phase S100, the control unit 100 does not change connectionrelationships of the scan chains and performs a flush test with theconnection relationships of the scan chains unchanged. The flush test isa test of shifting in a predetermined flush pattern to a scan chain andchecking an output of the scan chain to determine whether the input testpattern is output. In this way, it is possible to determine whether thescan chain is faulty.

According to an exemplary embodiment, a flush pattern which is providedto the input of a scan chain to perform a flush test may include logichighs and logic lows at a predetermined ratio and/or in a predeterminedsequence. For example, the flush pattern may be a bit sequence in whicha binary number “0011” is repeated. Accordingly, when an output whichdoes not have the predetermined ratio and/or the predetermined sequenceis provided from the output of the scan chain, it is possible todetermine whether the scan chain is faulty.

In the example of the first operation shown in FIG. 4 , a fault islocated in the second scan chain SC2. When the fault is a stuck-atfault, the output of the second scan chain SC2 has a fixed logic level,and when the fault is a delay fault, a pattern different from the inputflush pattern is output. Accordingly, the control unit 100 may determinewhether the second scan chain SC2 is faulty from the output of thesecond scan chain SC2. When the flush test is performed, the first scanchain SC1 and the third scan chain SC3 provide an output correspondingto the input flush pattern, but the second scan chain SC2 outputs asignal generated under the influence of the fault. Consequently, it ispossible to know that the fault is located in the second scan chain SC2.

Subsequently, in the example of a second operation shown in FIG. 5 , thecontrol unit 100 changes paths in the scan partition by providing pathcontrol signals. According to an exemplary embodiment, assuming that thelength of a scan chain including L scan cells is L and the number ofscan chains included in the scan partition SP is N, the control unit 100changes paths by providing a path control signal pci to an (N^(i))^(th)column where N^(i) is smaller than but closest to L.

In the exemplary embodiment illustrated in FIG. 5 , because 3²=9, i isdetermined to be 2. Accordingly, the control unit 100 outputs the pathcontrol signal pc2 to the 9^(th) (=3²) column, thereby changing paths.Although the paths are changed, a second scan chain SC2 a outputs asignal generated under the influence of the fault, and thus it ispossible to know that the fault is located in advance of a path changepoint, that is, in a region indicated by a broken-line quadrangle in thesecond scan chain SC2 a.

In the exemplary embodiment of a third operation illustrated in FIG. 6 ,the control unit 100 changes paths by providing a path control signal to(multiples of N^(i-1))^(th) columns. However, the paths of the ninthcolumn col. 9 which have already been changed are not changed.Accordingly, the control unit 100 outputs the path control signal pc1 toa third column col. 3 and a sixth column col. 6 which are (multiples of3 (=3¹))^(th) columns, thereby changing paths.

As results of a flush test performed after the path change, a secondscan chain SC2 b and a third scan chain SC3 b of which the paths havebeen changed output signals generated without the influence of thefault, but a first scan chain SC1 b outputs a signal generated under theinfluence of the fault. Accordingly, the control unit 100 can determinethat the fault is located in scan cells (a broken-line quadrangle) thatcorrespond in common to the second scan chain SC2 a in the previousoperation and a first scan chain SC1 b after this path change.

Subsequently, the control unit 100 changes paths by sequentiallyproviding a path control signal to (multiples of 1 (i.e., N⁰=1))^(th)columns of which the paths have not been changed. After the path change,a scan chain from which a signal generated under the influence of thefault is output is detected in the subsequent flush test results, and acommon point between the detected scan chain and the scan chain of theprevious operation is determined to detect the position of the fault.

In the exemplary embodiment of a fourth operation illustrated in FIG. 7, the control unit 100 changes paths by providing the path controlsignal pc0 to a first column col. 1, a second column col. 2, a fifthcolumn col. 5, a seventh column col. 7, and an eighth column col. 8which are (multiples of 1 (=3⁰))^(th) columns other than columns ofwhich the paths have not been changed already.

When a flush test is performed after the path change, a second scanchain SC2 c and a third scan chain SC3 c output signals generatedwithout the influence of the fault, but a first scan chain SC1 c outputsa signal generated under the influence of the fault. Accordingly, it ispossible to know that the fault is located in the first scan chain SC1c. Also, from the previous flush test results and the present flush testresults, it is possible to know that the fault is located in abroken-line quadrangle in which the scan chain SC1 b and the scan chainSC1 c overlap each other.

In this way, when the first phase S100 is performed, it is possible toaccurately detect all the positions of single faults located in the scanpartition. When no fault is detected or one or two faults are detectedin the scan partition, the control unit 100 may finish the faultdetection process with the first phase S100. Like this, when faultdetection is finished by detecting one or two single faults, the timeand power required for the fault detection can be reduced, and thus itis possible to increase productivity.

Next, the first phase S100 and the second phase S200 of a faultdetection method according to the present embodiment will be describedwith another example. FIGS. 8 to 11 are diagrams illustrating the firstphase S100. In the shown embodiment, a scan chain length L is 8, and thenumber N of scan chains included in a scan partition is 2. 2^(i)=2²=4 isthe maximum value smaller than 8, the length of the scan chain.Accordingly, the control unit 100 provides the path control signal pc2to the 4^(th) (=2²) column col. 4.

Also, the path control signal pc1 is provided to the second column col.2 and the sixth column col. 6 that are (multiples of 2 (=2¹))^(th)columns to which no path control signal has been provided. Subsequently,the path control signal pc0 is provided to the first column col. 1, thethird column col. 3, the fifth column col. 5, and the seventh columncol. 7 that are (multiples of 1 (=2⁰))^(th) columns to which no pathcontrol signal has been provided.

Referring to FIG. 8 , in a first operation of the first phase S100, thecontrol unit 100 does not change paths of the scan cells. A flush testis performed without changing the paths of the scan cells. As flush testresults, the first scan chain SC1 and the second scan chain SC2 bothprovide outputs under the influence of faults. Accordingly, faults aredetermined to be located in the first scan chain SC1 and the second scanchain SC2 as indicated by broken-line quadrangles.

Referring to FIG. 9 , since the largest value of 2^(i) smaller than 8which is the scan chain length L is 2²=4, the control unit 100 changespaths by providing the path control signal pc2 to the fourth column col.4. Results of a flush test performed after the path change indicate thata second scan chain SC2 a provides an output without the influence offaults and a first scan chain SC1 a provides an output under theinfluence of faults.

Accordingly, from the results of the flush test, a positional range offaults may be reduced to regions indicated by broken-line quadrangles.

Referring to FIG. 10 , the control unit 100 changes paths by providingthe path control signal pc1 to the second column col. 2 and the sixthcolumn col. 6 of which the paths have not been changed already among(multiples of 2 (=2¹))^(th) columns. From results of a flush testperformed after the path change, it is possible to know that a firstscan chain SC1 b and a second scan chain SC2 b both provide outputsunder the influence of faults.

Referring to FIG. 11 , the control unit 100 changes paths by providingthe path control signal pc0 to the first column col. 1, the third columncol. 3, the fifth column col. 5, and the seventh column col. 7 of whichthe paths have not been changed already among (multiples of 1(=2⁰))^(th) columns. From results of a flush test performed after thepath change, it is possible to know that a first scan chain SC1 c and asecond scan chain SC2 c both provide outputs under the influence offaults. A positional range of faults may be determined to be eight scancells by performing the first phase S100.

Next, the second phase S200 will be described with reference to FIGS. 12to 16 . In the second phase S200, the control unit 100 provides pathcontrol signals so that scan chains may be formed through paths thathave not been changed and connected in the first phase S100. Paths arechanged by providing 0, 0, and 1 as values of the path control signalspc0, pc1, and pc2 in the exemplary embodiment of the first phase S100illustrated in FIG. 9 , by providing 0, 1, and 1 as values of the pathcontrol signals pc0, pc1, and pc2 in the exemplary embodimentillustrated in FIG. 10 , and by providing 1, 1, and 1 as values of thepath control signals pc0, pc1, and pc2 in the exemplary embodimentillustrated in FIG. 11 .

However, in the second phase S200, paths are formed by providing acombination of the path control signals pc0, pc1, and pc2 that is notprovided in the first phase S100. As an exemplary embodiment, pathsformed by providing a combination of 0, 1, and 0, 1, 0, and 1, etc. asvalues of the path control signals pc0, pc1, and pc2 are not formed inthe first phase S100. In the second phase S200, the control unit 100changes paths of the scan chains to paths that are not formed in thefirst phase S100 by providing a combination of values of the pathcontrol signals pc0, pc1, and pc2 that are not provided in the firstphase S100.

For example, the control unit 100 may remove combinations of values ofthe path control signals pc0, pc1, and pc2 that are provided in thefirst phase S100 from among 000 to 111 and then change paths byoutputting the path control signals pc0, pc1, and pc2 having values of aremaining combination.

FIG. 12 is a diagram illustrating a connection relationship in any oneoperation of the second phase S200. Referring to FIG. 12 , in thepresent operation, the control unit 100 changes paths by providing 0, 1,and 0 as values of the path control signals pc0, pc1, and pc2. After thepath change, a first scan chain SC1 d and a second scan chain SC2 d areinvolved in faults and thus both output signals generated under theinfluence of the faults.

FIG. 13 is a diagram illustrating a connection relationship in anotheroperation of the second phase 200. Referring to FIG. 12 , in the presentoperation, the control unit 100 changes paths by providing 1, 0, and 0as values of the path control signals pc0, pc1, and pc2. After the pathchange, a first scan chain SC1 e and a second scan chain SC2 e areinvolved in faults and thus both output signals generated under theinfluence of the faults.

FIG. 14 is a diagram illustrating a connection relationship in stillanother operation of the second phase 200. Referring to FIG. 13 , in thepresent operation, the control unit 100 changes paths by providing 1, 0,and 1 as values of the path control signals pc0, pc1, and pc2. After thepath change, a second scan chain SC2 f is not involved in faults andthus outputs a signal generated without the influence of the faults. Onthe other hand, a first scan chain SC1 f is involved in faults and thusoutputs a signal generated under the influence of the faults.Accordingly, when a positional range of faults is determined byoverlapping a positional range of faults determined in the previousphase and/or the previous operation and a positional range of faultsdetected in the present operation, a positional range of faults may bereduced to a region indicated by broken-line quadrangles.

FIG. 15 is a diagram illustrating a connection relationship in yetanother operation of the second phase S200. Referring to FIG. 15 , inthe present operation, the control unit 100 changes paths by providing1, 1, and 0 as values of the path control signals pc0, pc1, and pc2.After the path change, a first scan chain SC1 g and a second scan chainSC2 g are both involved in faults and thus both output signals generatedunder the influence of the faults.

When the first phase S100 is performed on multiple faults, a positionalrange of three faults can be reduced to eight scan cells. Subsequently,when the second phase S200 is performed, the positional range of thefaults can additionally be reduced to four scan cells. Consequently,according to the present exemplary embodiment, it is possible to detectmultiple faults at a high resolution.

However, the path control scan flipflops PSFF according to the presentexemplary embodiment include a scan flipflop and a MUX, and a fault mayoccur at the MUX which changes a path. A method of detecting whether aMUX is faulty will be described below with reference to FIGS. 16 and 17. FIG. 16 is a diagram illustrating an initial operation of the firstphase S100. FIG. 16 illustrates a case in which paths are not changedeven when path control signals are provided because a stuck-at faultoccurs at scan flipflops located in a fourth column col. 4 and a fifthcolumn col. 5 of a second scan chain SC2 and a scan flipflop located ina second column col. 2 of a third scan chain SC3 and a fault occurs at aMUX of a path control scan flipflop in a third column col. 3 of thesecond scan chain SC2 and a MUX of a path control scan flipflop in thefifth column col. 5 of the third scan chain SC3.

According to an exemplary embodiment, in the first operation of thefirst phase S100, a flush test is performed without changing paths ofthe scan chains. For example, the flush test is performed by inputtingflush patterns of 0011, 1001, and 1100 to a first scan chain SC1, thesecond scan chain SC2, and the third scan chain SC3, respectively.

The first scan chain SC1 which is not involved in faults outputs 0011.On the other hand, the second scan chain SC2 is connected to the firstscan chain SC1 due to the fault of the MUX and outputs 1111 or 0000 dueto the stuck-at faults of the scan flipflops. Also, the third scan chainSC3 outputs 1110 or 0000 due to the stuck-at fault of the scan flipflop.From this, whether a stuck-at fault has occurred at scan flipflops maybe determined, but the faults of the MUXs are not detected.

FIG. 17 is a diagram schematically illustrating a last operation of theabove-described first phase S100 according to the present exemplaryembodiment. Referring to FIG. 17 , the control unit 100 provides pathcontrol signals such that paths are changed. A flush test is performedby inputting flush patterns of 0011, 1001, and 1100 to a first scanchain SC1 c, a second scan chain SC2 c, and a third scan chain SC3 c,respectively.

The third scan chain SC3 c outputs a pattern of 1111 or 0000 due to thestuck-at fault of the scan flipflop, and the second scan chain SC2 coutputs the input flush pattern of 1001 because there is no fault. Onother hand, a fault occurs at the MUX of the path control scan flipfloplocated in the fifth column col. 5 of the first scan chain SC1 c, andthus the first scan chain SC1 c is connected to the third scan chain SC3c. Accordingly, the first scan chain SC1 c outputs 1100 which is theflush pattern input to the third scan chain SC3 c.

In other words, a flush test is performed by inputting a flush patternto a scan chain, and then a fault of a MUX can be detected by detectinga shifted phase of a signal output from the flush test through the inputflush pattern.

To aid in understanding the present invention, the present invention hasbeen described with reference to the exemplary embodiments shown in theaccompanying drawings. However, the embodiments are intended forimplementation and only exemplary. Those of ordinary skill in the artshould appreciate that various modifications and other equivalentembodiments can be made from the embodiments. Therefore, the technicalscope of the present invention should be determined by the followingclaims.

What is claimed is:
 1. A scan device comprising a scan partitionincluding a plurality of scan chains which include path control scanflipflops connected to scan flipflops in cascade, wherein connectionpaths of the scan flipflops in the scan partition are controllable, andthe connection paths of the path control scan flipflops are controlledto detect a position of a fault such that a fault range in the scanpartition is reduced to diagnose the fault.
 2. The scan device of claim1, wherein the path control scan flipflops are disposed in an array inthe scan partition, and the connection paths of the path control scanflipflops disposed in the same column in the array are controlled withthe same path control signal.
 3. The scan device of claim 1, whereineach of the path control scan flipflops comprises: a first input towhich an output of a previous stage is provided in the scan chain inwhich the path control scan flipflop is disposed; a second input towhich an output of the same column as the path control scan flipflop inanother scan chain included in the scan partition is provided; amultiplexer (MUX) configured to output any one of signals provided tothe first input and the second input according to a path control signal;and a flipflop.
 4. The scan device of claim 1, wherein the scan devicediagnosing the fault: performs a first phase of controlling theconnection paths of the path control scan flipflops to reduce the faultrange in the scan partition and detect the position of the fault; andfurther performs a second phase when three or more faults are detectedin the scan partition as a result of the first phase.
 5. The scan deviceof claim 4, wherein each of the scan chains includes L of the scanflipflops, the scan partition includes the N scan chains, and the firstphase comprises: (a) performing a flush test without changing the paths;(b) providing a path control signal to an (N^(i))^(th) column, whereN^(i) is smaller than but closest to L, to change the paths andperforming a flush test; and (c) sequentially providing the path controlsignal to (multiples of N^(i-1))^(th) columns and (multiples ofN^(i-2))^(th) columns to a first column, of which the paths have notbeen changed, to change the paths and performing a flush test (N, L, andi: integers greater than or equal to 0).
 6. The scan device of claim 5,wherein the paths formed in the second phase are paths which are notconnected in operations (a) to (c).
 7. The scan device of claim 4,wherein, when no fault is detected or two or fewer faults are detectedin the scan partition as a result of the first phase, the scan devicestops detecting the position of the fault.
 8. The scan device of claim5, wherein the position of the fault is detected through the flush test,which provides a flush pattern including logic highs and logic lows at apredetermined ratio, and when an input signal including the logic highsand the logic lows at the predetermined ratio is output with a changedphase, the path control scan flipflop is determined to be faulty.
 9. Amethod of diagnosing a scan chain fault, the method comprising: a firstphase of changing connection paths of path control scan flipflops toreduce a fault range in a scan partition, which includes a plurality ofscan chains including the path control scan flipflops connected tosimple scan flipflops in cascade, and detect a fault; and a second phasein which the path control scan flipflops are connected to connectionpaths, which have not been changed in the first phase, according to aresult of the first phase to detect a position of the fault in the scanpartition.
 10. The method of claim 9, wherein the path control scanflipflops are disposed in an array in the scan partition, and theconnection paths of the path control scan flipflops disposed in the samecolumn in the array are controlled with the same path control signal.11. The method of claim 9, wherein each of the path control scanflipflops comprises: a first input to which an output of a previousstage is provided in the scan chain in which the path control scanflipflop is disposed; a second input to which an output of the samecolumn as the path control scan flipflop in another scan chain includedin the scan partition is provided; a multiplexer (MUX) configured tooutput any one of signals provided to the first input and the secondinput according to a path control signal; and a flipflop.
 12. The methodof claim 9, wherein the second phase is performed when three or morefaults are detected in the scan partition as a result of the firstphase.
 13. The method of claim 9, wherein each of the scan chainsincludes L of the scan flipflops, the scan partition includes the N scanchains, and the first phase comprises: (a) performing a flush testwithout changing the paths; (b) providing a path control signal to an(N^(i))^(th) column, where N^(i) is smaller than but closest to L, tochange the paths and performing a flush test; and (c) sequentiallyproviding the path control signal to (multiples of N^(i-1))^(th) columnsand (multiples of N^(i-2))^(th) columns to a first column, of which thepaths have not been changed, to change the paths and performing a flushtest (N, L, and i: integers greater than or equal to 0).
 14. The methodof claim 13, wherein the second phase comprises providing the pathcontrol signal to the (N^(i))^(th) column and N^(i-1)th column to thefirst column in order of not receiving the path control signal inoperations (a) to (c) to detect the fault.
 15. The method of claim 9,wherein, when no fault is detected or two or fewer faults are detectedin the scan partition as a result of the first phase, the detection ofthe position of the fault is stopped.
 16. The method of claim 13,wherein the position of the fault is detected through the flush test,which provides a flush pattern including logic highs and logic lows at apredetermined ratio, and when an input signal having the logic highs andthe logic lows at the predetermined ratio is output with a differentphase than the input flush pattern, the path control scan flipflop isdetermined to be faulty.